Analysis of pulsed I-V curves and power slump in gaas and gan fets

Y. Kazami, D. Kasai, K. Yonemoto, K. Horio

研究成果: Paper査読

抄録

Turn-on characteristics of GaAs MESFETs are simulated in which substrate traps and surface states are considered. Quasi-pulsed I-V curves are derived from the turn-on characteristics, indicating that so-called power slump could occur both due to substrate traps and due to surface states. Transient simulations of GaN MESFETs are also performed in which deep levels in a semi-insulating buffer layer are considered. So-called drain lag is shown to arise as in GaAs MESFETs. It is also shown that the power slump in GaN MESFETs could occur due to deep levels in the semi-insulating buffer layer.

本文言語English
ページ46-53
ページ数8
出版ステータスPublished - 2005 12 1
イベント20th Symposium on Microelectronics Technology and Devices, SBMicro 2005 - Florianopolis, Brazil
継続期間: 2005 9 42005 9 7

Conference

Conference20th Symposium on Microelectronics Technology and Devices, SBMicro 2005
CountryBrazil
CityFlorianopolis
Period05/9/405/9/7

ASJC Scopus subject areas

  • Engineering(all)

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