Analysis of the operating-speed and power consumption of GaAs DCFL D-type flip-flops

研究成果: Article

3 引用 (Scopus)

抄録

The article describes, in terms of steady-state sinusoidal analysis, simple analytical expressions for the operating speed and power consumption of DCFL D-type flip-flops. The maximum operating speed fOPmax is limited to fT sin{π/(nG + 1)}/2nFO, where fT is the cut-off frequency, nG is the number of critical path gates, and nFO is the fan-out number. In contrast, the influence of maximum frequency of oscillation fmax on fOPmax is small compared with that for fT, but an FET with a higher fmax can reduce the power consumption. These analytical results agree well with the experimental results.

元の言語English
ページ(範囲)807-811
ページ数5
ジャーナルSolid-State Electronics
41
発行部数6
出版物ステータスPublished - 1997 6
外部発表Yes

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flip-flops
Flip flop circuits
Electric power utilization
Cutoff frequency
Field effect transistors
fans
Fans
cut-off
field effect transistors
oscillations
gallium arsenide

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

これを引用

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