This paper proposes a new architecture for TDMA (Time Division Multiple Access) equipment and functional-module realization in microelectronics to increase reliability and to reduce hardware size and development time. The approach described in this paper basically involves digitalization of analog circuits allowing realization using digital LSI circuits, and analog IC implementation for high-speed circuits. Moreover, in order to allow general-purpose LSI circuits and IC's, TDMA equipment is reconfigurated into a hardware-oriented and simplified architecture. Using this architecture and optimal function assigning to each module, six types of general-purpose synchronization unit LSI circuits have been developed in addition to eleven types of LSI circuits and IC's, i.e., three types of digital LSI circuits, four types of MAIC's (Monolithic Analog IC's), and four types of HIC's (Hybrid IC's) for a burst modem. As a result of this LSI circuit and IC implementation, the hardware size of TDMA equipment has been reduced to one-fifth of the conventional size, and maintenance-free capability has been achieved. Moreover, these developed LSI circuits and IC's are all applicable for various types of TDMA equipment, and the same development time and hardware size reduction is expected for various types of future TDMA equipment.
ASJC Scopus subject areas
- コンピュータ ネットワークおよび通信