Asymmetric sidewall process for high performance LDD MOSFET's

Tadahiko Horiuchi, Tetsuya Homma, Yukinobu Murao, Koichiro Okumura

研究成果: Article査読

29 被引用数 (Scopus)

抄録

An asymmetric LDD sidewall spacer technology is presented which gives a high drivability of LDD MOSFET without sacrificing hot carrier immunity. The asymmetric spacer is fabricated by using a selective oxide deposition technique. The process implemented in a CMOS fabrication sequence requires no additional masking step. The fact that no reliability problems are introduced in the transistor characteristics by the selective oxide deposition process is also examined.

本文言語English
ページ(範囲)186-190
ページ数5
ジャーナルIEEE Transactions on Electron Devices
41
2
DOI
出版ステータスPublished - 1994 2 1
外部発表はい

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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