Automated selective multi-threshold design for ultra-low standby applications

Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa

研究成果: Paper査読

63 被引用数 (Scopus)

抄録

This paper describes an automated design technique to selectively use multi-threshold CMOS (MTCMOS) in a cell-by-cell fashion. MT cells consisting of low-Vth transistors and high-Vth sleep transistors are assigned to critical paths, while high-Vth cells are assigned to non-critical paths. Compared to the conventional MTCMOS, the gate delay is not affected by the discharge patterns of other gates because there is no virtual ground to be shared. We applied this technique to a test chip of a DSP core. The worst path-delay was improved by 14% over the single high-Vth design without increasing standby leakage at 10% area overhead.

本文言語English
ページ202-206
ページ数5
DOI
出版ステータスPublished - 2002
外部発表はい
イベントProceedings of the 2002 International Symposium on Low Power Electronics and Design - Monterey, CA, United States
継続期間: 2002 8 122002 8 14

Conference

ConferenceProceedings of the 2002 International Symposium on Low Power Electronics and Design
国/地域United States
CityMonterey, CA
Period02/8/1202/8/14

ASJC Scopus subject areas

  • 工学(全般)

フィンガープリント

「Automated selective multi-threshold design for ultra-low standby applications」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル