Co-analysis of signal and power integrity of 3D stacked package using flexible printed circuits

Keisuke Ikemiya, Masato Kanazawa, Toshio Sudo, Shizuaki Masuda, Yasushi Hirakawa, Kikuo Wada

研究成果: Conference contribution

抄録

Three dimensionally stacked package using FFCSP (Flexible carrier Folded real Chip Size Package) has been developed as one solution of high-density DRAM module. FPC (Flexible printed circuit) was effectively utilized to construct the pads at the both top and bottom sides of PoP (package-on-package) structure. In such multi-tiered package structures, the power supply stability for the upper tiered package is estimated to be worse than that of the lower tiered package due to parasitic inductance. In this paper, the co-analysis model including signal integrity (SI) and power integrity (PI) has been established to evaluate the power supply and signal quality among the multi-tiered chips. In particular, the power distribution networks (PDN) and eye diagrams for multi-tiered package were discussed.

本文言語English
ホスト出版物のタイトルEMC EUROPE 2012 - International Symposium on Electromagnetic Compatibility, Proceedings
DOI
出版ステータスPublished - 2012 12 1
イベントInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012 - Rome, Italy
継続期間: 2012 9 172012 9 21

出版物シリーズ

名前IEEE International Symposium on Electromagnetic Compatibility
ISSN(印刷版)1077-4076
ISSN(電子版)2158-1118

Conference

ConferenceInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012
国/地域Italy
CityRome
Period12/9/1712/9/21

ASJC Scopus subject areas

  • 凝縮系物理学
  • 電子工学および電気工学

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