Correlation of PDN impedance between measurements and simulation of 3D-SiP

Shohei Kawaguchi, Masaomi Sato, Hiroki Takatani, Yosuke Tanaka, Haruya Fujita, Yoichi Suto, Toshio Sudo

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Recently, ultra-wide bus 3D-SiP with TSV's has attracted great attention to achieve energy-saving and high-performance system level module. TSV technology is a new technology of vertical wiring to make shorter than the conventional wire bonding. However, the power supply integrity and signal integrity has become an issue due to the increase of simultaneous switching output buffers. In this paper, PDN impedances of 3D-SiP were examined by the measurement and simulation. Simulated PDN impedances of three chips were well correlated with the measured results.

本文言語English
ホスト出版物のタイトルEDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium
ページ158-161
ページ数4
DOI
出版ステータスPublished - 2013 12 1
イベント2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013 - Nara, Japan
継続期間: 2013 12 122013 12 15

出版物シリーズ

名前EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium

Conference

Conference2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013
CountryJapan
CityNara
Period13/12/1213/12/15

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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