Datapath generator based on gate-level symbolic layout

Nobu Matsumoto, Yoko Watanabe, Kimiyoshi Usami, Yukio Sugeno, Hiroshi Hatada, Shojiro Mori

研究成果: Conference contribution

1 引用 (Scopus)

抜粋

A data-path generator that generates high-density LSI mask layouts equivalent to hand-crafted ones is described. An entry of the generator is a hierarchical symbolic layout at the gate level. The bit-and-row-slicing technique is a key feature for realizing large-size and high-density data-path generation. A 21K-transistor data-path whose density is 5.64 KTr/mm2, greater than the 5.38 KTr/mm2 of a hand-crafted datapath, was generated using 1-μm CMOS technology.

元の言語English
ホスト出版物のタイトル27th ACM/IEEE Design Automation Conference. Proceedings 1990
出版場所Piscataway, NJ, United States
出版者Publ by IEEE
ページ388-393
ページ数6
ISBN(印刷物)081869650X
出版物ステータスPublished - 1990
外部発表Yes
イベント27th ACM/IEEE Design Automation Conference - Orlando, FL, USA
継続期間: 1990 6 241990 6 28

Other

Other27th ACM/IEEE Design Automation Conference
Orlando, FL, USA
期間90/6/2490/6/28

    フィンガープリント

ASJC Scopus subject areas

  • Engineering(all)

これを引用

Matsumoto, N., Watanabe, Y., Usami, K., Sugeno, Y., Hatada, H., & Mori, S. (1990). Datapath generator based on gate-level symbolic layout. : 27th ACM/IEEE Design Automation Conference. Proceedings 1990 (pp. 388-393). Piscataway, NJ, United States: Publ by IEEE.