Delay modeling and static timing analysis for MTCMOS circuits

Naoaki Ohkubo, Kimiyoshi Usami

研究成果: Conference contribution

6 被引用数 (Scopus)

抄録

One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology targeting at MTCMOS circuits. In the proposed method, we prepare a delay look-up table (LUT) consisting of the input slew, the output load capacitance, the virtual ground length, and a power-switch size. Using this LUT, we compute a circuit delay for each logic cell by applying the linear interpolation. Experimental results show that the proposed methodology enables to estimate the critical path delay in a good accuracy.

本文言語English
ホスト出版物のタイトルProceedings of the ASP-DAC 2006
ホスト出版物のサブタイトルAsia and South Pacific Design Automation Conference 2006
ページ570-575
ページ数6
出版ステータスPublished - 2006 9 19
イベントASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006 - Yokohama, Japan
継続期間: 2006 1 242006 1 27

出版物シリーズ

名前Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2006

Conference

ConferenceASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006
CountryJapan
CityYokohama
Period06/1/2406/1/27

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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