Design and implementation methodology of energy-efficient Standard Cell Memory with optimized Body-Bias separation in Silicon-on-Thin-BOX

Yusuke Yoshida, Kimiyoshi Usami

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.

本文言語English
ホスト出版物のタイトルJoint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings
編集者Androula G. Nassiopoulou, Panagiotis Sarafis
出版社Institute of Electrical and Electronics Engineers Inc.
ページ43-46
ページ数4
ISBN(電子版)9781509053131
DOI
出版ステータスPublished - 2017 6 29
イベント2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Athens, Greece
継続期間: 2017 4 32017 4 5

出版物シリーズ

名前Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings

Other

Other2017 Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017
国/地域Greece
CityAthens
Period17/4/317/4/5

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 器械工学
  • 電子工学および電気工学

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