Design of a 32-bit Microprocessor, TX1

Takeji Tokumaru; Eiji Masuda; Kimiyoshi Usami; Misao Miyata; Jun Iwamura; Chikahiro Hori

doi:10.1109/4.34075

Design of a 32-bit Microprocessor, TX1

Takeji Tokumaru, Eiji Masuda, Kimiyoshi Usami, Misao Miyata, Jun Iwamura, Chikahiro Hori

研究成果: Article › 査読

1 被引用数 (Scopus)

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This paper describes implementation of a VLSI microproces sor, the TX1, and especially focuses on the design method, which meets the requirements of short design time with reasonable chip size. A one-phase clock system, which is a better solution for high-speed operation but requires careful design for evading the skew problem, is discussed. Design for testability embedded in the chip is also described. The TX1 is fabricated with a 1.0-μm two-laver metal CMOS process. The chip contains 450K transistors in a 10.89× 10.27-mm² die.

本文言語	English
ページ（範囲）	938-944
ページ数	7
ジャーナル	IEEE Journal of Solid-State Circuits
巻	24
号	4
DOI	https://doi.org/10.1109/4.34075
出版ステータス	Published - 1989 8月
外部発表	はい

ASJC Scopus subject areas

電子工学および電気工学

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10.1109/4.34075

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author = "Takeji Tokumaru and Eiji Masuda and Kimiyoshi Usami and Misao Miyata and Jun Iwamura and Chikahiro Hori",

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AU - Hori, Chikahiro

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Design of a 32-bit Microprocessor, TX1

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