Design of a 32bit microprocessor, TX1

Takeji Tokumaru, Eiji Masuda, Chikahiro Hori, Kimiyoshi Usami, Misao Miyata, Jun Iwamura

研究成果: Paper

4 引用 (Scopus)

抜粋

TX1 is a 32-bit microprocessor of the Toshiba TX series of microprocessors, which are fully based on the TRON architecture. TX1 supports 88 instructions and executes basic instructions in 2 cycles at 25 MHz. The average performance of TX1 is more than 5 MIPS. Implementation of the TX1 is described. Particular emphasis is placed on a design style suitable for VLSI microprocessors including full utilization of design automation such as logic synthesis and automatic place and router. The clock skew problem is also studied and successfully resolved.

元の言語English
ページ33-34
ページ数2
出版物ステータスPublished - 1988 12 1
イベント1988 Symposium on VLSI Circuits - Digest of Technical Papers - Tokyo, Japan
継続期間: 1988 8 221988 8 24

Other

Other1988 Symposium on VLSI Circuits - Digest of Technical Papers
Tokyo, Japan
期間88/8/2288/8/24

ASJC Scopus subject areas

  • Engineering(all)

フィンガープリント Design of a 32bit microprocessor, TX1' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

  • これを引用

    Tokumaru, T., Masuda, E., Hori, C., Usami, K., Miyata, M., & Iwamura, J. (1988). Design of a 32bit microprocessor, TX1. 33-34. 論文発表場所 1988 Symposium on VLSI Circuits - Digest of Technical Papers, Tokyo, Japan, .