Effective processing on a digital signal processor with complex arithmetic capability

Yoshimasa Negishi, Eiji Watanabe, Akinori Nishihara, Takeshi Yanagisawa

研究成果: Conference contribution

抜粋

Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. First, we show that 2D circuits and transversal circuits with real coefficients can be implemented by complex multiplications. Next, we introduce a new computational mode (advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.

元の言語English
ホスト出版物のタイトルIEEE Asia-Pacific Conference on Circuits and Systems - Proceedings
出版者IEEE
ページ619-622
ページ数4
ISBN(印刷物)0780351460
出版物ステータスPublished - 1998 12 1
イベントProceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems - Microelectronics and Integrating Systems (IEEE APCCAS-98) - Chiangmai, Thailand
継続期間: 1998 11 241998 11 27

出版物シリーズ

名前IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings

Other

OtherProceedings of the 1998 IEEE Asia-Pacific Conference on Circuits and Systems - Microelectronics and Integrating Systems (IEEE APCCAS-98)
Chiangmai, Thailand
期間98/11/2498/11/27

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • これを引用

    Negishi, Y., Watanabe, E., Nishihara, A., & Yanagisawa, T. (1998). Effective processing on a digital signal processor with complex arithmetic capability. : IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings (pp. 619-622). (IEEE Asia-Pacific Conference on Circuits and Systems - Proceedings). IEEE.