抄録
This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
本文言語 | English |
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ページ(範囲) | 2785-2796 |
ページ数 | 12 |
ジャーナル | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
巻 | E100A |
号 | 12 |
DOI | |
出版ステータス | Published - 2017 12月 |
ASJC Scopus subject areas
- 信号処理
- コンピュータ グラフィックスおよびコンピュータ支援設計
- 電子工学および電気工学
- 応用数学