抄録
This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
| 元の言語 | English |
|---|---|
| ページ（範囲） | 2785-2796 |
| ページ数 | 12 |
| ジャーナル | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
| 巻 | E100A |
| 発行部数 | 12 |
| DOI | |
| 出版物ステータス | Published - 2017 12 1 |
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ASJC Scopus subject areas
- Signal Processing
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
- Applied Mathematics
これを引用
Energy-efficient standard cell memory with optimized body-bias separation in Silicon-on-Thin-BOX (SOTB). / Yoshida, Yusuke; Usami, Kimiyoshi.
：: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 巻 E100A, 番号 12, 01.12.2017, p. 2785-2796.研究成果: Article
}
TY - JOUR
T1 - Energy-efficient standard cell memory with optimized body-bias separation in Silicon-on-Thin-BOX (SOTB)
AU - Yoshida, Yusuke
AU - Usami, Kimiyoshi
PY - 2017/12/1
Y1 - 2017/12/1
N2 - This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
AB - This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
KW - Body bias
KW - Energy-efficient
KW - Silicon-on-thin-box (SOTB)
KW - Standard cell memory
KW - Ultra-low voltage
UR - http://www.scopus.com/inward/record.url?scp=85038210465&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85038210465&partnerID=8YFLogxK
U2 - 10.1587/transfun.E100.A.2785
DO - 10.1587/transfun.E100.A.2785
M3 - Article
AN - SCOPUS:85038210465
VL - E100A
SP - 2785
EP - 2796
JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
SN - 0916-8508
IS - 12
ER -