Fast road lane detection by parallel image processor and monocular camera

研究成果: Conference contribution

抜粋

Automatic road lane detection is one of the significant problem in Intelligent Transport Systems (ITS). Many studies have been conducted for this interesting problem by using on-vehicle cameras. However, those methods still needs a dozens of milliseconds for image processing. To develop the quick control of the vehicle following lanes, further computational time reduction is expected. Furthermore, regarding the applications, compact hardware is also expected for implementation. Thus, we study on computational time reduction of the road lane detection by using a small-type parallel image processor. Here, computational time is reduced by developing a lane detection algorithm regarding the parallel processing concept of that hardware. According to the experiments, we could limit average computational time for 20 milliseconds with a good lane detection performance.

元の言語English
ホスト出版物のタイトルWMSCI 2015 - 19th World Multi-Conference on Systemics, Cybernetics and Informatics, Proceedings
出版者International Institute of Informatics and Systemics, IIIS
ページ188-191
ページ数4
2
ISBN(印刷物)9781941763254
出版物ステータスPublished - 2015
外部発表Yes
イベント19th World Multi-Conference on Systemics, Cybernetics and Informatics, WMSCI 2015 - Orlando, United States
継続期間: 2015 7 122015 7 15

Other

Other19th World Multi-Conference on Systemics, Cybernetics and Informatics, WMSCI 2015
United States
Orlando
期間15/7/1215/7/15

ASJC Scopus subject areas

  • Engineering(all)

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  • これを引用

    Premachandra, C. (2015). Fast road lane detection by parallel image processor and monocular camera. : WMSCI 2015 - 19th World Multi-Conference on Systemics, Cybernetics and Informatics, Proceedings (巻 2, pp. 188-191). International Institute of Informatics and Systemics, IIIS.