A high-speed data transfer network for a parallel processing system has been developed by multichip packaging technology. The high-speed data transfer network connecting multiple processor units (PU's) has been achieved in a module by 8-b slice GaAs bus logic (BL) LSI's, which operate at 100 MHz. The GaAs multichip module consists of 12 GaAs BL LSI's in a 3 by 4 matrix. Each GaAs chip is sealed in a chip carrier with bumps. The chip carrier is flip-chip bonded to the copper/polyimide thin film multilayer substrate. The characteristic impedance of the signal lines on the module is controlled to 75 Ω to be compatible with the GaAs original interface level. The thin film termination resistors are made of Ni/Cr in the substrate to prevent reflections. Heat generated from the module, which has a total of 90-W power dissipation, is transferred through four heat-pipes with fins to the ambient by forced air cooling at below 2 m/s. A 3-Gb/s data transfer rate (32 b × 100 MHz) can be realized by 4 stacked modules of 48 GaAs BL's.
|ジャーナル||IEEE Transactions on Components, Hybrids, and Manufacturing Technology|
|出版ステータス||Published - 1990 12月|
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