Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating

L. Zhao, D. Ikebuchi, Y. Saito, M. Kamata, N. Seki, Y. Kojima, H. Amano, S. Koyama, T. Hashida, Y. Umahashi, D. Masuda, K. Usami, K. Kimura, M. Namiki, S. Takeda, H. Nakamura, M. Kondo

研究成果: Article

10 引用 (Scopus)
元の言語English
ページ(範囲)87-88
ジャーナル16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011
出版物ステータスPublished - 2011 1 26

これを引用

Zhao, L., Ikebuchi, D., Saito, Y., Kamata, M., Seki, N., Kojima, Y., ... Kondo, M. (2011). Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating. 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011, 87-88.

Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating. / Zhao, L.; Ikebuchi, D.; Saito, Y.; Kamata, M.; Seki, N.; Kojima, Y.; Amano, H.; Koyama, S.; Hashida, T.; Umahashi, Y.; Masuda, D.; Usami, K.; Kimura, K.; Namiki, M.; Takeda, S.; Nakamura, H.; Kondo, M.

:: 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011, 26.01.2011, p. 87-88.

研究成果: Article

Zhao, L, Ikebuchi, D, Saito, Y, Kamata, M, Seki, N, Kojima, Y, Amano, H, Koyama, S, Hashida, T, Umahashi, Y, Masuda, D, Usami, K, Kimura, K, Namiki, M, Takeda, S, Nakamura, H & Kondo, M 2011, 'Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating', 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011, pp. 87-88.
Zhao, L. ; Ikebuchi, D. ; Saito, Y. ; Kamata, M. ; Seki, N. ; Kojima, Y. ; Amano, H. ; Koyama, S. ; Hashida, T. ; Umahashi, Y. ; Masuda, D. ; Usami, K. ; Kimura, K. ; Namiki, M. ; Takeda, S. ; Nakamura, H. ; Kondo, M. / Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating. :: 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011. 2011 ; pp. 87-88.
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author = "L. Zhao and D. Ikebuchi and Y. Saito and M. Kamata and N. Seki and Y. Kojima and H. Amano and S. Koyama and T. Hashida and Y. Umahashi and D. Masuda and K. Usami and K. Kimura and M. Namiki and S. Takeda and H. Nakamura and M. Kondo",
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T1 - Geyser-2: The Second Prototype CPU with Fine-grained Run-time Power Gating

AU - Zhao, L.

AU - Ikebuchi, D.

AU - Saito, Y.

AU - Kamata, M.

AU - Seki, N.

AU - Kojima, Y.

AU - Amano, H.

AU - Koyama, S.

AU - Hashida, T.

AU - Umahashi, Y.

AU - Masuda, D.

AU - Usami, K.

AU - Kimura, K.

AU - Namiki, M.

AU - Takeda, S.

AU - Nakamura, H.

AU - Kondo, M.

PY - 2011/1/26

Y1 - 2011/1/26

M3 - Article

SP - 87

EP - 88

JO - 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011

JF - 16th Asia and South Pacific Design Automation Conference (ASP-DAC) 2011

ER -