Half-micron pitch Cu interconnection technology

Kazuyoshi Ueno, Koichi Ohto, Kinji Tsunenari

研究成果: Conference article査読

12 被引用数 (Scopus)

抄録

Half-micron pitch Cu interconnections have been achieved by self-aligned plug (SAP), MOCVD-TiN barrier layer (MBL), and alumina capped oxidation-free structure (ACOS). Low resistance 0.12μm Cu interconnections whose effective resistivity is 1.9μΩcm have been obtained. Improved thermal stability up to 600°C has been achieved for quarter-micron Cu contacts. Cu oxidation has been suppressed without increasing resistance by using a trimethylaluminum (TMA) treatment.

本文言語English
ページ(範囲)27-28
ページ数2
ジャーナルDigest of Technical Papers - Symposium on VLSI Technology
出版ステータスPublished - 1995 12 1
外部発表はい
イベントProceedings of the 1995 Symposium on VLSI Technology - Kyoto, Jpn
継続期間: 1995 6 61995 6 8

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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