This paper describes a new GaAs static flip-flop, called TD-FF (Tri-state Driver Flip-Flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The TD-FF operates at a data rate of 10 Gbps with 18 mW power consumption at 0.8 V supply voltage. The 10 Gbps power consumption is 1/5 of the minimum value ever reported for D-FFs (Delay-type Flip-Flops). The authors also demonstrate a 1/8 static frequency divider IC using the TD-FF configuration. This IC operates up to 10 GHz with 38 mW at 0.8 V supply voltage.
|ホスト出版物のタイトル||NEC Research and Development|
|出版物ステータス||Published - 1995 1 1|
ASJC Scopus subject areas
- Electrical and Electronic Engineering