Level-shifter free approach for multi-Vdd SOTB employing adaptive Vt modulation for pMOSFET

Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano

研究成果: Conference contribution

1 引用 (Scopus)

抜粋

This paper proposes a level-shifter free (LSF) approach for multi-VDD design to employ a combination of body bias control and a superior threshold-voltage (Vt) modulation capability of SOTB (Silicon on Thin BOX) devices. We applied this approach to a microprocessor test chip with low-voltage (VDDL) and high-voltage (VDDH) domains, and fabricated it in a 65nm SOTB technology. Measurement results demonstrated that the chip correctly operates at VDDL=0.6V and VDDH=1.2V under the reverse-body-bias (RBB) of 2V for pMOS transistors in the VDDH domain while suppressing the static dc current.

元の言語English
ホスト出版物のタイトル2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
出版者Institute of Electrical and Electronics Engineers Inc.
ページ1-3
ページ数3
2018-March
ISBN(電子版)9781538637654
DOI
出版物ステータスPublished - 2018 3 7
イベント2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States
継続期間: 2017 10 162017 10 18

Other

Other2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
United States
Burlingame
期間17/10/1617/10/18

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • これを引用

    Usami, K., Kogure, S., Yoshida, Y., Magasaki, R., & Amano, H. (2018). Level-shifter free approach for multi-Vdd SOTB employing adaptive Vt modulation for pMOSFET. : 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 (巻 2018-March, pp. 1-3). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/S3S.2017.8309226