Level-shifter-less approach for multi-V DD design to use body bias control in FD-SOI

Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Level shifters to convert signal swings from low-voltage (VDDL) to high-voltage (VDDH) are required at the boundary of voltage domains in SoC employing multiple supply voltages. However, they cost delay, power and area in addition to increasing the complexity of physical design. This paper proposes a level-shifter-less (LSL) approach to use a reverse body bias (RBB) in the VDDH domain and superior threshold-voltage modulation capability of FD-SOI devices. Simulation results and measurements of a fabricated chip demonstrated that the chip applying the LSL approach correctly operates at VDDL=0.6V and VDDH=1.2V under RBB of 2V for pMOS transistors while suppressing the static dc current in the VDDH domain.

本文言語English
ホスト出版物のタイトル25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Proceedings
出版社IEEE Computer Society
ISBN(電子版)9781538628805
DOI
出版ステータスPublished - 2017 12 13
イベント25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Abu Dhabi, United Arab Emirates
継続期間: 2017 10 232017 10 25

出版物シリーズ

名前IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
ISSN(印刷版)2324-8432
ISSN(電子版)2324-8440

Other

Other25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
CountryUnited Arab Emirates
CityAbu Dhabi
Period17/10/2317/10/25

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

フィンガープリント 「Level-shifter-less approach for multi-V <sub>DD</sub> design to use body bias control in FD-SOI」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル