Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI

Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano

研究成果: Conference contribution

抜粋

Level shifters to convert signal swings from low-voltage (VDDL) to high-voltage (VDDH) are required at the boundary of voltage domains in SoC employing multiple supply voltages. However, they cost delay, power and area in addition to increasing the complexity of physical design. This paper proposes a level-shifter-less (LSL) approach to use a reverse body bias (RBB) at pMOS transistors in the VDDH domain and superior threshold-voltage modulation capability of FD-SOI devices. Simulation results and measurements of a fabricated chip showed that the chip applying the LSL approach correctly operates at VDDL = 0.6 V and VDDH = 1.2 V under 2 V pMOS RBB while suppressing the static dc current in the VDDH domain. We also demonstrate that adaptive RBB control for pMOS can maintain effectiveness of this approach under process and temperature variations.

元の言語English
ホスト出版物のタイトルVLSI-SoC
ホスト出版物のサブタイトルOpportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers
編集者José Monteiro, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, Michail Maniatakos, Ricardo Reis
出版者Springer New York LLC
ページ1-21
ページ数21
ISBN(印刷物)9783030156626
DOI
出版物ステータスPublished - 2019 1 1
イベント25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Abu Dhabi, United Arab Emirates
継続期間: 2017 10 232017 10 25

出版物シリーズ

名前IFIP Advances in Information and Communication Technology
500
ISSN(印刷物)1868-4238

Other

Other25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
United Arab Emirates
Abu Dhabi
期間17/10/2317/10/25

ASJC Scopus subject areas

  • Information Systems and Management

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  • これを引用

    Usami, K., Kogure, S., Yoshida, Y., Magasaki, R., & Amano, H. (2019). Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI. : J. Monteiro, I. A. M. Elfadel, M. Sonza Reorda, H. F. Ugurdag, M. Maniatakos, & R. Reis (版), VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers (pp. 1-21). (IFIP Advances in Information and Communication Technology; 巻数 500). Springer New York LLC. https://doi.org/10.1007/978-3-030-15663-3_1