Low power consumption analog matched filter

Masahiro Sasaki, Takeyasu Sakai, Takashi Matsumoto

研究成果: Chapter

抄録

A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.

本文言語English
ホスト出版物のタイトルRecent Advances in Circuits, Systems and Signal Processing
出版社World Scientific and Engineering Academy and Society
ページ31-34
ページ数4
ISBN(印刷版)9608052645
出版ステータスPublished - 2002 12 1
外部発表はい

ASJC Scopus subject areas

  • Engineering(all)

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