Low resistance copper via technology

K. Ueno, V. M. Donnelly, Y. Tsuchiya, H. Aoki

研究成果: Conference article査読

3 被引用数 (Scopus)


In order to reduce specific contact resistance at via/interconnect interface and to avoid device degradation with Cu diffusion into dielectrics, via cleaning technology is a critical issue for a scaled down Cu multilevel metallization. Effects of cleaning processes are investigated for CHF3 plasma-etched SiO2/SiN/Cu via-structures. Effects of dilute HF (DHF) cleaning, hydrogen plasma cleaning, oxygen plasma cleaning, hexafluoroacetylacetone (H(hfac)) vapor cleaning, and vacuum anneal cleaning are investigated using an angle-resolved x-ray photoelectron spectroscopy (XPS). Cu contamination removal using dilute oxalic acid (DOA) is investigated using total reflection x-ray fluorescence analysis (TRXRF). Based on the results, we developed an optimized cleaning sequence which consists of a brief oxygen plasma exposure, DHF dipping, followed by exposure to H(hfac) vapors. The cleaning sequence is effective in obtaining a clean dielectric surface and an oxide-free Cu surface at via bottom. Direct-contacted via structures were fabricated by a dual-damascene process using the cleaning sequence. The specific contact resistance reduces to 20% of the reported values. We expect that the via resistance is low enough to be used in 0.13 μm generation and beyond.

ジャーナルMaterials Research Society Symposium - Proceedings
出版ステータスPublished - 1999
イベントProceedings of the 1999 MRS Spring Meeting - Symposium N: 'Advanced Interconnects and Contacts' - San Francisco, CA, United States
継続期間: 1999 4月 51999 4月 7

ASJC Scopus subject areas

  • 材料科学(全般)
  • 凝縮系物理学
  • 材料力学
  • 機械工学


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