Measurement and analysis of SSN and Jitter of FPGA

Haruya Fujita, Yo Iijima, Toshio Sudo

研究成果: Conference contribution

1 引用 (Scopus)

抜粋

Parasitic inductance that exists in a package induces SSN (Simultaneous Switching Noise) and timing jitter. These noises cause malfunction of LSI and systems. The goal of this paper is to clarify the influence of the effective inductance of the package including mutual inductance by changing the number of simultaneously switching buffers and alternating adjacent buffers in the reverse direction each other. In this study, measured SSNs were reproduced by HSPICE simulation. The whole simulation model consisted of on-chip PDN (Power Distribution Network), package PDN and board PDN, along with I/O buffer model. The simulated SSN waveforms agreed well with the measured results.

元の言語English
ホスト出版物のタイトルEMC EUROPE 2012 - International Symposium on Electromagnetic Compatibility, Proceedings
DOI
出版物ステータスPublished - 2012 12 1
イベントInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012 - Rome, Italy
継続期間: 2012 9 172012 9 21

出版物シリーズ

名前IEEE International Symposium on Electromagnetic Compatibility
ISSN(印刷物)1077-4076
ISSN(電子版)2158-1118

Conference

ConferenceInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012
Italy
Rome
期間12/9/1712/9/21

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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  • これを引用

    Fujita, H., Iijima, Y., & Sudo, T. (2012). Measurement and analysis of SSN and Jitter of FPGA. : EMC EUROPE 2012 - International Symposium on Electromagnetic Compatibility, Proceedings [6396872] (IEEE International Symposium on Electromagnetic Compatibility). https://doi.org/10.1109/EMCEurope.2012.6396872