The conventional local PWM-DAC for the ΔΣ D/A converter generates the PWM wave by dividing the clock signal. In this method, the sampling speed is decreased greatly by increasing the resolution. In this paper, we propose a new PWM-DAC with the Multi-Delay inverter. This DAC does not require the dividing clock as the conventional PWM-DAC. As simulation results, we show that the 5-th order ΔΣ D/A converter with the propose DAC achieves the S/N of 130 dB at the MOS transistor threshold voltage deviation of 100 mV.
|ジャーナル||IEEJ Transactions on Electronics, Information and Systems|
|出版ステータス||Published - 2013|
ASJC Scopus subject areas
- Electrical and Electronic Engineering