A new silicon-on-insulator (SOI) flash memory with a side channel and side floating gate has been proposed to reduce the power consumption and to increase the packing density in this paper. We utilized atomic layer doping (ALD) method for forming the ultra shallow junction on the side surface of the device. The threshold voltage shift of 0.25 V was obtained for small erasing/writing voltages in a 0.1 μm SOI flash memory. This device can be operated with a small number of electrons.
|ジャーナル||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|出版ステータス||Published - 2003 6月|
ASJC Scopus subject areas