A novel single-stage second-order structure for Gm-C filters is presented. It allows ample reduction in hardware and thus power consumption. Moreover, due to exploiting otherwise parasitic poles, the structure allows much higher bandwidth than in conventional designs, be achieved. To verify effectiveness of new concept, and based on the new approach to implement second-order stages, a third-order and a fifth-order continuous-time low-pass filters were implemented. The filters fabricated in a 0.5μm CMOS process, achieved more than 430 MHz, -3dB bandwidth and less than -55dB THD for a 400 mVp-p 100 MHz input signal. All these accomplished with a factor of about four reduction in hardware and power. The bandwidth, output voltage swing, and dynamic range are far larger than those of any other CMOS low-pass filters thus far reported, which have bandwidth higher than 100 MHz.
|ジャーナル||AEU - International Journal of Electronics and Communications|
|出版ステータス||Published - 2005 9月 15|
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