This paper describes novel rapid thermal annealing for GaAs wafers under vacuum conditions (VRTA) using a three-zone lamp power control method. The developed RTA technology eliminates generation of crystallographic slip lines and wafer deformation due to the convection effect caused by ambient gas. A three-zone lamp power control method produced excellent uniformity in the activated layer, presenting the best data ever attained by RTA. Also, numerical simulation demonstrates improved temperature uniformity achieved by a three-zone lamp power control method which reduces the edge radiation effect. Moreover, we have found that VRTA technology is particularly effective for annealing large-size GaAs wafers, which are more easily deformed or slip-lined than 2-in. wafers. We have applied VRTA to fabricating ion-implanted n+ contact regions for self-aligned 0.5-μm-gate doped-channel hetero-metal-insulator- semiconductor field-effect transistors with a lightly doped drain, and have obtained excellent Vt uniformity, σVt=19 mV, on a 2-in.-diam wafer. These features, together with a simple wafer-supporting method, using several quartz pins, cause the improved VRTA technology to provide high throughput and production yield for high-performance short-gate GaAs integrated circuits.
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