Numerical simulation of GaAs MESFET's with heavily compensated substrates.

K. Horio, H. Yanai, T. Ikoma

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

The authors describe numerical simulations of GaAs MESFETs (metal-semiconductor field-effect transistors) on a semi-insulating substrate in which impurities are compensated by deep traps. It is shown that higher acceptor density in the substrate results in lower device current due to the formation of a space-charge layer at the channel-substrate interface. It is also shown that drain currents increase continuously because electrons are injected to fill the traps in the substrate and a current path through the substrate is formed. This substrate current becomes pronounced for shorter-gate-length MESFETs on a substrate with lower impurity densities. It is suggested that to minimize short-channel effects in GaAs MESFETs, impurity densities in the semi-insulating substrate must be high.

本文言語English
ホスト出版物のタイトルNASECODE V Proc Fifth Int Conf Numer Anal Semicond Devices Integr Circuit
出版社Publ by IEEE
ページ237-242
ページ数6
ISBN(印刷版)0906783720, 9780906783726
DOI
出版ステータスPublished - 1987
イベントNASECODE V: Proceedings of the Fifth International Conference on the Numerical Analysis of Semiconductor Devices and Integrated Circuits - Dublin, Ireland
継続期間: 1987 6 171987 6 19

出版物シリーズ

名前NASECODE V Proc Fifth Int Conf Numer Anal Semicond Devices Integr Circuit

Other

OtherNASECODE V: Proceedings of the Fifth International Conference on the Numerical Analysis of Semiconductor Devices and Integrated Circuits
CityDublin, Ireland
Period87/6/1787/6/19

ASJC Scopus subject areas

  • Engineering(all)

フィンガープリント 「Numerical simulation of GaAs MESFET's with heavily compensated substrates.」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル