Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects

J-F.Wang J-F.Wang, A.R.Sethuraman A.R.Sethuraman, L.Cook L.Cook, K.Ueno K.Ueno, Y.Tsuchiya Y.Tsuchiya, Kazuyoshi Ueno

研究成果: Article

元の言語English
ページ(範囲)387-392
ジャーナルProceedings of 1996 VLSI Multilevel Interconnection Conference
出版物ステータスPublished - 1996 5 1

これを引用

J-F.Wang, J-F. W., A.R.Sethuraman, A. R. S., L.Cook, L. C., K.Ueno, K. U., Y.Tsuchiya, Y. T., & Ueno, K. (1996). Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects. Proceedings of 1996 VLSI Multilevel Interconnection Conference, 387-392.