This paper reviews electromigration (EM) and stress-induced voiding (SIV) in damascene copper (Cu) interconnects and also presents reliability enhancement technologies for scaled-down LSIs and highly reliable chip applications such as automotive systems. Although Cu interconnects have more than 10 times longer lifetime than AlCu interconnects, it is necessary to develop reliability enhancement technologies such as Cu-alloy and metal capping layer to overcome the reliability degradation due to scaling-down and to fulfill higher reliability requirements. Cu-alloys can improve EM reliability up to several 10 times, but a trade-off relation exists between resistivity increase and reliability enhancement. In order to achieve both low resistance and high reliability in scaled-down interconnects for 45nm-node and beyond, a CoWP cap process is most promising among present reliability enhancement technologies. Low contamination CoWP cap process has been developed using alkaline-metal-free electroless plating without palladium (Pd) catalyst. More than 100 times longer EM lifetime was demonstrated by the CoWP capped Cu interconnects with minimum resistance increase.
|出版ステータス||Published - 2005 12 1|
|イベント||207th ECS Meeting - Quebec, Canada|
継続期間: 2005 5 16 → 2005 5 20
|Conference||207th ECS Meeting|
|Period||05/5/16 → 05/5/20|
ASJC Scopus subject areas