Selective multi-threshold technique for high-performance and low-standby applications

Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa

研究成果: Article査読

1 被引用数 (Scopus)

抄録

In portable applications such as W-CDMA cell phones, high performance and low standby leakage are both required. We propose an automated design technique to selectively use multi-threshold CMOS (MTCMOS) in a cell-by-cell fashion. MT cells consisting of low-Vth transistors and high-Vth sleep transistors are newly introduced. MT cells are assigned to critical paths to speed up, while High-Vth cells are assigned to non-critical paths to reduce leakage. Compared to the conventional MTCMOS, the gate delay is not affected by the discharge patterns of other gates because there is no virtual ground to be shared. We applied this technique to a test chip of a DSP core for W-CDMA baseband LSI. The worst path-delay was improved by 14% over the single high-Vth design without increasing standby leakage at 10% area overhead.

本文言語English
ページ(範囲)2667-2673
ページ数7
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E85-A
12
出版ステータスPublished - 2002 12
外部発表はい

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学
  • 応用数学

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