Simulation of slow current transients and current compression in AlGaAs/GaAs HFETs

H. Ikarashi, K. Kitamura, N. Kurosawa, K. Horio

研究成果: Article査読

2 被引用数 (Scopus)

抄録

Two-dimensional transient simulations of AlGaAs/GaAs HFETs are performed in which substrate traps and surface states are considered. When the drain voltage is raised abruptly, the drain current overshoots the steady-state value, and when it is lowered abruptly, the drain current remains at a low value, showing drain-lag behavior. Turn-on characteristics are also calculated when both the gate voltage and the drain voltage are changed abruptly, and quasi-pulsed I-V curves are derived from them. It is shown that the drain lag due to substrate traps could become a cause of so-called current compression of the HFETs. It is also shown that gate lag due to surface states could become a major cause of the current compression.

本文言語English
ページ(範囲)357-360
ページ数4
ジャーナルJournal of Computational Electronics
5
4
DOI
出版ステータスPublished - 2006 12 1

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 原子分子物理学および光学
  • モデリングとシミュレーション
  • 電子工学および電気工学

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