Submicrometer gold interconnect wiring by sidewall electroplating technology

Makoto Hirano, Shinji Aoyama, Kimiyoshi Yamasaki

研究成果: Article査読

6 被引用数 (Scopus)

抄録

A novel technique for forming submicrometer gold wires is proposed to realize high-density interconnection in LSIs. The wires are fabricated into a structure which is buried in an insulator spacer using sidewall electroplating technology. Optimum plating conditions are studied to achieve good metaling conformability and uniformity. By optimizing the plating conditions, gold interconnect wires with submicrometer linewidth and spacing are formed with good surface planarity of the buried structure.

本文言語English
ページ(範囲)L553-L555
ジャーナルJapanese Journal of Applied Physics
33
4
DOI
出版ステータスPublished - 1994 4月
外部発表はい

ASJC Scopus subject areas

  • 工学(全般)
  • 物理学および天文学(全般)

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