Three-dimensional interconnect technology for ultra-compact MMICs

Makoto Hirano, Kenjiro Nishikawa, Ichihiko Toyoda, Shinji Aoyama, Suehiro Sugitani, Kimiyoshi Yamasaki

    研究成果: Article査読

    6 被引用数 (Scopus)

    抄録

    A novel interconnect technology was reviewed, which was developed for three-dimensional (3-D) ultra-compact MMICs. Using O2/He RIE for the through hole and trench formation of a thick polyimide insulator layer, low-current electroplating for gold sidewall formation in the through-holes and the trenches, and ion-milling with WSiN metal stopper for gold patterning, a complete three-dimensional metal interconnection structure was built. We call this fabrication method as folded metal interconnection technology with thick insulator(FMIT). The 3-D interconnection structure involves vertical interconnection elements such as a wall-like microwire for shielding or coupling, and a pillar-like via-connection with multi-leveled planar interconnections in a 10-μm-thick polyimide matrix on an IC chip. The structure provides many passive functional elements and circuits in an extremely small area. This technology stages the next-generation of ultra-compact MMICs by offering the circuit designers great design flexibility and higher integration of circuits.

    本文言語English
    ページ(範囲)1451-1455
    ページ数5
    ジャーナルSolid-State Electronics
    41
    10
    DOI
    出版ステータスPublished - 1997 10

    ASJC Scopus subject areas

    • 電子材料、光学材料、および磁性材料
    • 凝縮系物理学
    • 電子工学および電気工学
    • 材料化学

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