TY - JOUR
T1 - Three-dimensional interconnect technology for ultra-compact MMICs
AU - Hirano, Makoto
AU - Nishikawa, Kenjiro
AU - Toyoda, Ichihiko
AU - Aoyama, Shinji
AU - Sugitani, Suehiro
AU - Yamasaki, Kimiyoshi
PY - 1997/10
Y1 - 1997/10
N2 - A novel interconnect technology was reviewed, which was developed for three-dimensional (3-D) ultra-compact MMICs. Using O2/He RIE for the through hole and trench formation of a thick polyimide insulator layer, low-current electroplating for gold sidewall formation in the through-holes and the trenches, and ion-milling with WSiN metal stopper for gold patterning, a complete three-dimensional metal interconnection structure was built. We call this fabrication method as folded metal interconnection technology with thick insulator(FMIT). The 3-D interconnection structure involves vertical interconnection elements such as a wall-like microwire for shielding or coupling, and a pillar-like via-connection with multi-leveled planar interconnections in a 10-μm-thick polyimide matrix on an IC chip. The structure provides many passive functional elements and circuits in an extremely small area. This technology stages the next-generation of ultra-compact MMICs by offering the circuit designers great design flexibility and higher integration of circuits.
AB - A novel interconnect technology was reviewed, which was developed for three-dimensional (3-D) ultra-compact MMICs. Using O2/He RIE for the through hole and trench formation of a thick polyimide insulator layer, low-current electroplating for gold sidewall formation in the through-holes and the trenches, and ion-milling with WSiN metal stopper for gold patterning, a complete three-dimensional metal interconnection structure was built. We call this fabrication method as folded metal interconnection technology with thick insulator(FMIT). The 3-D interconnection structure involves vertical interconnection elements such as a wall-like microwire for shielding or coupling, and a pillar-like via-connection with multi-leveled planar interconnections in a 10-μm-thick polyimide matrix on an IC chip. The structure provides many passive functional elements and circuits in an extremely small area. This technology stages the next-generation of ultra-compact MMICs by offering the circuit designers great design flexibility and higher integration of circuits.
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U2 - 10.1016/S0038-1101(97)00088-9
DO - 10.1016/S0038-1101(97)00088-9
M3 - Article
AN - SCOPUS:0031248564
VL - 41
SP - 1451
EP - 1455
JO - Solid-State Electronics
JF - Solid-State Electronics
SN - 0038-1101
IS - 10
ER -