Two-dimensional analysis of field-plate effects on surface-state-related current transients and power slump in GaAs FETs

In this paper, we carry out a 2-D transient analysis of field-plate GaAs metal-semiconductor field-effect transistors (FETs) by taking surface states into account. Quasi-pulsed currentvoltage curves are derived from the transient characteristics. We show that drain lag and current slump (power slump) due to surface states are reduced by introducing a field plate because the fixed potential at the field plate mitigates the trapping effects of the surface states. The dependence of lag and current slump on the field-plate length and the SiO₂ passivation layer thickness is also studied. We show that it is possible to reduce the current slump and maintain the high-frequency performance of GaAs FETs at optimum values of the field-plate length and the SiO₂ layer thickness.