Two-dimensional analysis of field-plate effects on surface-state-related current transients and power slump in GaAs FETs

Kazushige Horio, Toshiya Tanaka, Keiichi Itagaki, Atsushi Nakajima

研究成果: Article査読

26 被引用数 (Scopus)

抄録

In this paper, we carry out a 2-D transient analysis of field-plate GaAs metal-semiconductor field-effect transistors (FETs) by taking surface states into account. Quasi-pulsed currentvoltage curves are derived from the transient characteristics. We show that drain lag and current slump (power slump) due to surface states are reduced by introducing a field plate because the fixed potential at the field plate mitigates the trapping effects of the surface states. The dependence of lag and current slump on the field-plate length and the SiO2 passivation layer thickness is also studied. We show that it is possible to reduce the current slump and maintain the high-frequency performance of GaAs FETs at optimum values of the field-plate length and the SiO2 layer thickness.

本文言語English
論文番号5667052
ページ(範囲)698-703
ページ数6
ジャーナルIEEE Transactions on Electron Devices
58
3
DOI
出版ステータスPublished - 2011 3
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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