Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs

Kazushige Horio, T. Yamada

研究成果: Conference contribution

抄録

Effects of surface states on turn-on characteristics of recessed-gate GaAs MESFETs are studied by two-dimensional simulation. It is found that the recess depth dr is deep and the distance between the gate and the recess edge Lr is set to be very narrow, the gate-lag (slow current transient) extinguishes for a case with surface states considered on horizontal planes only. However, in a realistic case with surface states included on both horizontal and vertical planes, the gate-lag is not eliminated even if dr is made rather deep. This is attributed to the fact that when the deep-acceptor-like surface state acts as a hole trap, the thickness of surface depletion layer can change much by the applied gate bias. To eliminate the gate-lag, the deep acceptor should be made electron-trap type. This can be realized by reducing the surface state density.

元の言語English
ホスト出版物のタイトルWorkshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO
編集者 Anon
出版場所Piscataway, NJ, United States
出版者IEEE
ページ7-12
ページ数6
出版物ステータスPublished - 1997
イベントProceedings of the 1997 Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO - London, UK
継続期間: 1997 11 241997 11 25

Other

OtherProceedings of the 1997 Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO
London, UK
期間97/11/2497/11/25

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Surface states
Hole traps
Electron traps

ASJC Scopus subject areas

  • Engineering(all)

これを引用

Horio, K., & Yamada, T. (1997). Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs. : Anon (版), Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO (pp. 7-12). Piscataway, NJ, United States: IEEE.

Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs. / Horio, Kazushige; Yamada, T.

Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO. 版 / Anon. Piscataway, NJ, United States : IEEE, 1997. p. 7-12.

研究成果: Conference contribution

Horio, K & Yamada, T 1997, Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs. : Anon (版), Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO. IEEE, Piscataway, NJ, United States, pp. 7-12, Proceedings of the 1997 Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO, London, UK, 97/11/24.
Horio K, Yamada T. Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs. : Anon, 編集者, Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO. Piscataway, NJ, United States: IEEE. 1997. p. 7-12
Horio, Kazushige ; Yamada, T. / Two-dimensional analysis of gate-lag phenomena in recessed-gate GaAs MESFETs. Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO. 編集者 / Anon. Piscataway, NJ, United States : IEEE, 1997. pp. 7-12
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