抄録
SCFL D-FFs with supply voltage as low as 1.3V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 μm AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.
本文言語 | English |
---|---|
ページ | 51-54 |
ページ数 | 4 |
出版ステータス | Published - 1994 12月 1 |
外部発表 | はい |
イベント | Proceedingsof the 1994 IEEE GaAs IC Symposium - Philadelphia, PA, USA 継続期間: 1994 10月 16 → 1994 10月 19 |
Other
Other | Proceedingsof the 1994 IEEE GaAs IC Symposium |
---|---|
City | Philadelphia, PA, USA |
Period | 94/10/16 → 94/10/19 |
ASJC Scopus subject areas
- 電子工学および電気工学