Ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

Masahiro Fujii; Tadashi Maeda; Yasuo Ohno; Masatoshi Tokushima; Masaoki Ishikawa; Muneo Fukaishi; Hikaru Hida

Ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

Masahiro Fujii, Tadashi Maeda, Yasuo Ohno, Masatoshi Tokushima, Masaoki Ishikawa, Muneo Fukaishi, Hikaru Hida

研究成果: Paper › 査読

抄録

SCFL D-FFs with supply voltage as low as 1.3V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 μm AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.

本文言語	English
ページ	51-54
ページ数	4
出版ステータス	Published - 1994 12 1
外部発表	はい
イベント	Proceedingsof the 1994 IEEE GaAs IC Symposium - Philadelphia, PA, USA 継続期間: 1994 10 16 → 1994 10 19

Other

Other	Proceedingsof the 1994 IEEE GaAs IC Symposium
City	Philadelphia, PA, USA
Period	94/10/16 → 94/10/19

ASJC Scopus subject areas

電子工学および電気工学

他のファイルとリンク

Link to publication in Scopus

引用スタイル

@conference{95cfd77870af4b50841b8848df452de8,

title = "Ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage",

abstract = "SCFL D-FFs with supply voltage as low as 1.3V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 μm AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.",

author = "Masahiro Fujii and Tadashi Maeda and Yasuo Ohno and Masatoshi Tokushima and Masaoki Ishikawa and Muneo Fukaishi and Hikaru Hida",

year = "1994",

month = dec,

day = "1",

language = "English",

pages = "51--54",

note = "Proceedingsof the 1994 IEEE GaAs IC Symposium ; Conference date: 16-10-1994 Through 19-10-1994",

}

TY - CONF

T1 - Ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

AU - Fujii, Masahiro

AU - Maeda, Tadashi

AU - Ohno, Yasuo

AU - Tokushima, Masatoshi

AU - Ishikawa, Masaoki

AU - Fukaishi, Muneo

AU - Hida, Hikaru

PY - 1994/12/1

Y1 - 1994/12/1

N2 - SCFL D-FFs with supply voltage as low as 1.3V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 μm AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.

AB - SCFL D-FFs with supply voltage as low as 1.3V are designed and fabricated. The supply voltage is decreased by optimizing the logic swing and the voltage shift in the source followers. The D-FFs, using 0.25 μm AlGaAs/InGaAs HJFETs, operate at up to 10 Gbps, with power consumption as low as 19 mW.

UR - http://www.scopus.com/inward/record.url?scp=0028728414&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028728414&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0028728414

SP - 51

EP - 54

T2 - Proceedingsof the 1994 IEEE GaAs IC Symposium

Y2 - 16 October 1994 through 19 October 1994

ER -

Ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

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Other

ASJC Scopus subject areas

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