Ultra-low-power-consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4-GBPS optical-fiber communication systems

Keiichi Numata, Masahiro Fujii, Tadashi Maeda, Masatoshi Tokushima, Shigeki Wada, Muneo Fukaishi, Masaoki Ishikawa

研究成果: Paper査読

4 被引用数 (Scopus)

抄録

A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.

本文言語English
ページ39-42
ページ数4
出版ステータスPublished - 1995 12 1
外部発表はい
イベントProceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - San Diego, CA, USA
継続期間: 1995 10 291995 11 1

Other

OtherProceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium
CitySan Diego, CA, USA
Period95/10/2995/11/1

ASJC Scopus subject areas

  • 電子工学および電気工学

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