A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.
|出版ステータス||Published - 1995 12 1|
|イベント||Proceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - San Diego, CA, USA|
継続期間: 1995 10 29 → 1995 11 1
|Other||Proceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium|
|City||San Diego, CA, USA|
|Period||95/10/29 → 95/11/1|
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