This paper describes a GaAs divide-by-256/258 dual-modulus static prescaler IC. The prescaler has a pulse swallow counter-type architecture and quasi-differential switch flip-flop (QD-FF) as its basic circuit architecture. For the input buffer circuit, we have developed a circuit that we call a source coupled push-pull circuit (SCC), which can generate high-frequency complementary signals from a single phase signal at a low supply voltage. The IC operates at up to 14.5 GHz with a power consumption of 22 mW. The power consumption is 1/100 that of a previously reported prescaler.
|出版ステータス||Published - 1997 12月 1|
|イベント||Proceedings of the 1997 19th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - Anaheim, CA, USA|
継続期間: 1997 10月 12 → 1997 10月 15
|Other||Proceedings of the 1997 19th Annual IEEE Gallium Arsenide Integrated Circuit Symposium|
|City||Anaheim, CA, USA|
|Period||97/10/12 → 97/10/15|
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